The present disclosure relates to high-frequency semiconductor switch circuits for use in radio communication apparatuses having a small size, light weight, and low power consumption, such as a mobile telephone, etc., and high-frequency radio systems including such a high-frequency semiconductor switch circuit.
Mobile communication apparatuses, typified by a mobile telephone, require a high-frequency semiconductor switch circuit having a small size and low power consumption in order to switch high-frequency signal transmission paths, e.g., switch the antenna between transmission and reception. For example, such a high-frequency semiconductor switch circuit may include a gallium arsenide field effect transistor (GaAsFET), which has good high-frequency characteristics and low power consumption, as a switching element.
In recent years, highly-insulating semiconductor substrates, typified by a silicon-on-sapphire (SOS) substrate and a silicon-on-insulator (SOI) substrate, have been much improved. A technology of using a metal oxide semiconductor field effect transistor (MOSFET), which is less suitable for a high-frequency semiconductor switch circuit, as a switching element for switching paths, has also been developed.
Specifically, known is a high-frequency semiconductor switch circuit in which a path switching FET is provided between a common input/output terminal and each of a plurality of separate input/output terminals. However, the use of only single path switching FETs in a high-frequency semiconductor switch circuit causes a problem that it is difficult to improve isolation characteristics without an increase in insertion loss.
Therefore, in Japanese Unexamined Patent Publication Nos. H06-85641 and 2008-109591, a path switching FET is used in combination with a shunt FET. However, there is a problem that the path switching FET and the shunt FET cannot be separately controlled, and therefore, the isolation of a FET in the off state is poor.
In contrast to this, in Japanese Unexamined Patent Publication No. 2012-114729, a path switching FET and a shunt FET are separated from each other by a capacitor, and therefore, can be controlled using separate voltages.
However, in Japanese Unexamined Patent Publication No. 2012-114729 above, the gate, source, and drain of each of the path switching FET and the shunt FET are controlled using a high voltage (e.g., 2.5 V) or a low voltage (0 V). Therefore, when a large amplitude signal (e.g., 2 Vpp) is input to the common input/output terminal, the voltage of a FET in the off state ranges from 1.5 V to 3.5 V, where the center is 2.5 V, and therefore, the breakdown voltage (e.g., a maximum rated voltage of 2.7 V) is exceeded. Therefore, it is necessary to put a limit on the amplitude of an RF signal input to the common input/output terminal or use a FET having a higher breakdown voltage instead. However, there are the following problems: the limitation of the amplitude of the input RF signal leads to a failure to satisfy the desired characteristics; and the use of a FET having a higher breakdown voltage leads to an increase in insertion loss and an increase in chip size.